NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 754

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20.1.11
20.1.12
Note:
754
FREG3—Flash Region 3 (GbE) Register
(
Memory Address:SPIBAR + 60h
Default Value:
PR0—Protected Range 0 Register
(
Memory Address:SPIBAR + 74h
Default Value:
This register can not be written when the FLOCKDN bit is set to 1.
28:16
31:29
28:16
15:13
30:29
14:13
SPI Memory Mapped Configuration Registers
SPI Memory Mapped Configuration Registers
12:0
12:0
Bit
Bit
31
15
Reserved
Region Limit (RL): — RO. This field specifies address bits 24:12 for the Region 3
Limit.
The value in this register is loaded from the contents in the Flash
Descriptor.FLREG3.Region Limit.
Reserved
Region Base (RB): — RO. This specifies address bits 24:12 for the Region 3 Base
The value in this register is loaded from the contents in the Flash
Descriptor.FLREG3.Region Base.
Write Protection Enable: — R/WL. When set, this bit indicates that the Base and
Limit fields in this register are valid and that writes and erases directed to addresses
between them (inclusive) must be blocked by hardware. The base and limit fields are
ignored when this bit is cleared.
Reserved
Protected Range Limit: — R/WL. This field corresponds to FLA address bits 24:12 and
specifies the upper limit of the protected range. Address bits 11:0 are assumed to be
FFFh for the limit comparison. Any address greater than the value programmed in this
field is unaffected by this protected range.
Read Protection Enable: — R/WL. When set, this bit indicates that the Base and Limit
fields in this register are valid and that read directed to addresses between them
(inclusive) must be blocked by hardware. The base and limit fields are ignored when
this bit is cleared.
Reserved
Protected Range Base: — R/WL. This field corresponds to FLA address bits 24:12 and
specifies the lower base of the protected range. Address bits 11:0 are assumed to be
000h for the base comparison. Any address less than the value programmed in this
field is unaffected by this protected range.
00000000h
00000000h
Description
Description
Attribute:
Size:
Attribute:
Size:
)
)
Serial Peripheral Interface (SPI)
RO
32 bits
R/WL
32 bits
Intel
®
ICH8 Family Datasheet