NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 79

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Signal Description
2.17
Table 21.
2.18
Table 22.
Intel
®
ICH8 Family Datasheet
Miscellaneous Signals (Sheet 1 of 2)
Other Clocks
Other Clocks
Miscellaneous Signals
SATA_CLKN
SATA_CLKP
(Desktop Only) /
DMI_CLKP,
DMI_CLKN
LAN100_SLP
(Mobile Only)
INTVRMEN
CLK14
CLK48
Name
RTCRST#
BATLOW#
Name
SPKR
TP0
Type
I
I
I
I
Type
O
I
I
I
I
Oscillator Clock: This clock is used for 8254 timers. It runs at
14.31818 MHz. This clock is permitted to stop during S3 (or lower)
states.
48 MHz Clock: This clock is used to run the USB controller. It runs at
48.000 MHz. This clock is permitted to stop during S3 (or lower) states.
100 MHz Differential Clock: These signals are used to run the SATA
controller at 100 MHz. This clock is permitted to stop during S3/S4/S5
states.
100 MHz Differential Clock: These signals are used to run the Direct
Media Interface. Runs at 100 MHz.
Internal Voltage Regulator Enable: This signal enables the
internal VccSus1_05, VccSus1_5 and VccCL1_5 regulators. This
signal must be pulled-up to VccRTC.
Internal Voltage Regulator Enable: This signal enables the
internal voltage regulators powering VccLAN1_05 and VccCL1_05.
This signal must be pulled-up to VccRTC.
Speaker: The SPKR signal is the output of counter 2 and is
internally “ANDed” with Port 61h bit 1 to provide Speaker Data
Enable. This signal drives an external speaker driver device, which
in turn drives the system speaker. Upon PLTRST#, its output state
is 0.
NOTE: SPKR is sampled at the rising edge of PWROK as a
RTC Reset: When asserted, this signal resets register bits in the
RTC well.
NOTES:
1.
2.
Test Point 0: This signal must have an external pull-up to
VccSus3_3.
functional strap. See
is a weak integrated pull-down resistor on SPKR pin.
Unless CMOS is being cleared (only to be done in the G3
power state), the RTCRST# input must always be high
when all other RTC power planes are on.
In the case where the RTC battery is dead or missing on
the platform, the RTCRST# pin must rise before the
RSMRST# pin.
Description
Description
Section 2.26.1
for more details. There
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