NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 537
NH82801HBM S LB9A
Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet
1.NH82801HBM_S_LB9A.pdf
(890 pages)
Specifications of NH82801HBM S LB9A
Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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SATA Controller Registers (D31:F2)
12.4.2.13
12.4.2.14
Intel
®
ICH8 Family Datasheet
PxSACT—Port [5:0] Serial ATA Active (D31:F2)
Address Offset: Port 0: ABAR + 134h
Default Value:
PxCI—Port [5:0] Command Issue Register (D31:F2)
Address Offset: Port 0: ABAR + 138h
Default Value:
31:0
31:0
Bit
Bit
Device Status (DS) — R/W. System software sets this bit for SATA queuing operations
prior to setting the PxCI.CI bit in the same command slot entry. This field is cleared via
the Set Device Bits FIS.
This field is also cleared when PxCMD.ST (ABAR+118h/198h/218h/298h:bit 0) is
cleared by software, and as a result of a COMRESET or SRST.
Commands Issued (CI) — R/W. This field is set by software to indicate to the ICH8
that a command has been built-in system memory for a command slot and may be sent
to the device. When the ICH8 receives a FIS which clears the BSY and DRQ bits for the
command, it clears the corresponding bit in this register for that command slot. Bits in
this field shall only be set to 1 by software when PxCMD.ST is set to 1.
This field is also cleared when PxCMD.ST (ABAR+118h/198h/218h/298h:bit 0) is
cleared by software.
Port 1: ABAR + 1B4h
Port 2: ABAR + 234h
Port 3: ABAR + 2B4h (Desktop Only)
Port 4: ABAR + 334h (Desktop Only)
Port 5: ABAR + 3B4h (Desktop Only)
00000000h
Port 1: ABAR + 1B8h
Port 2: ABAR + 238h
Port 3: ABAR + 2B8h (Desktop Only)
Port 4: ABAR + 338h (Desktop Only)
Port 5: ABAR + 3B8h (Desktop Only)
00000000h
Description
Description
§ §
Attribute:
Size:
Attribute:
Size:
R/W
32 bits
R/W
32 bits
537
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