NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 711
NH82801HBM S LB9A
Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet
1.NH82801HBM_S_LB9A.pdf
(890 pages)
Specifications of NH82801HBM S LB9A
Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PCI Express* Configuration Registers
18.1.25
Intel
®
ICH8 Family Datasheet
DCAP—Device Capabilities Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 44h–47h
Default Value:
31:28
27:26
25:18
17:16
11:9
8:6
4:3
2:0
Bit
15
14
13
12
5
Reserved
Captured Slot Power Limit Scale (CSPS) — RO. Not supported.
Captured Slot Power Limit Value (CSPV) — RO. Not supported.
Reserved
Role Based Error Reporting (RBER) — RO. This bit indicates that this device
implements the functionality defined in the Error Reporting ECN as required by the PCI
Express 1.1 spec.
Power Indicator Present (PIP) — RO. This bit indicates no power indicator is
present on the root port.
Attention Indicator Present (AIP) — RO. This bit indicates no attention indicator is
present on the root port.
Attention Button Present (ABP) — RO. This bit indicates no attention button is
present on the root port.
Endpoint L1 Acceptable Latency (E1AL) — RO. This bit indicates more than 4 µs.
This field essentially has no meaning for root ports since root ports are not endpoints.
Endpoint L0 Acceptable Latency (E0AL) — RO. This bit indicates more than 64 µs.
This field essentially has no meaning for root ports since root ports are not endpoints.
Extended Tag Field Supported (ETFS) — RO. This bit indicates that 8-bit tag fields
are supported.
Phantom Functions Supported (PFS) — RO. No phantom functions supported.
Max Payload Size Supported (MPS) — RO. This field indicates the maximum
payload size supported is 128B.
00000FC0h
Description
Attribute:
Size:
RO
32 bits
711
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