NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 439

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCI-to-PCI Bridge Registers (D30:F0)
10.1.13
10.1.14
Intel
®
ICH8 Family Datasheet
MEMBASE_LIMIT—Memory Base and Limit Register
(PCI-PCI—D30:F0)
Offset Address: 20h–23h
Default Value:
This register defines the base and limit, aligned to a 1-MB boundary, of the non-
prefetchable memory area of the bridge. Accesses that are within the ranges specified
in this register will be sent to PCI if CMD.MSE is set. Accesses from PCI that are outside
the ranges specified will be accepted by the bridge if CMD.BME is set.
PREF_MEM_BASE_LIMIT—Prefetchable Memory Base
and Limit Register (PCI-PCI—D30:F0)
Offset Address: 24h–27h
Default Value:
Defines the base and limit, aligned to a 1-MB boundary, of the prefetchable memory
area of the bridge. Accesses that are within the ranges specified in this register will be
sent to PCI if CMD.MSE is set. Accesses from PCI that are outside the ranges specified
will be accepted by the bridge if CMD.BME is set.
31-20
19-16
31-20
19-16
15:4
15:4
3:0
3:0
Bit
Bit
Memory Limit (ML) — R/W. These bits are compared with bits 31:20 of the incoming
address to determine the upper 1-MB aligned value (exclusive) of the range. The
incoming address must be less than this value.
Reserved
Memory Base (MB) — R/W. These bits are compared with bits 31:20 of the incoming
address to determine the lower 1-MB aligned value (inclusive) of the range. The
incoming address must be greater than or equal to this value.
Reserved
Prefetchable Memory Limit (PML)
of the incoming address to determine the upper 1-MB aligned value (exclusive) of the
range. The incoming address must be less than this value.
64-bit Indicator (I64L)
Prefetchable Memory Base (PMB)
of the incoming address to determine the lower 1-MB aligned value (inclusive) of the
range. The incoming address must be greater than or equal to this value.
64-bit Indicator (I64B)
00000000h
00010001h
—
—
RO. Indicates support for 64-bit addressing.
RO. Indicates support for 64-bit addressing.
Description
Description
—
—
R/W. These bits are compared with bits 31:20
R/W. These bits are compared with bits 31:20
Attribute:
Size:
Attribute:
Size:
R/W, RO
32 bits
R/W, RO
32-bit
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