NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 530

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

530
Mobile Only)
(ICH8 Base,
and ICH8
ICH8DO,
(ICH8R,
ICH8DH
23:22
Only)
Bit
24
21
21
21
20
19
18
17
16
15
14
Device is ATAPI (ATAPI) — R/W. When set, the connected device is an ATAPI
device. This bit is used by the ICH8 to control whether or not to generate the
desktop LED when commands are active. See
activity LED.
Reserved
External SATA Port (ESP) — R/WO.
0 = This port supports internal SATA devices only.
1 = This port will be used with an external SATA device. When set, CAP.SXS must
Reserved
Reserved
Reserved
Interlock Switch Attached to Port (ISP) — R/WO. When interlock switches are
supported in the platform (CAP.SIS [ABAR+00h:bit 28] set), this indicates
whether this particular port has an interlock switch attached. This bit can be used
by system software to enable such features as aggressive power management, as
disconnects can always be detected regardless of PHY state with an interlock
switch. When this bit is set, it is expected that HPCP (bit 18) in this register is also
set.
The ICH8 takes no action on the state of this bit – it is for system software only.
For example, if this bit is cleared, and an interlock switch toggles, the ICH8 still
treats it as a proper interlock switch event.
Note that these bits are not reset on a HBA reset.
Hot Plug Capable Port (HPCP) — R/WO.
0 = Port is not capable of Hot-Plug.
1 = Port is Hot-Plug capable.
This indicates whether the platform exposes this port to a device which can be
Hot-Plugged. SATA by definition is hot-pluggable, but not all platforms are
constructed to allow the device to be removed (it may be screwed into the chassis,
for example). This bit can be used by system software to indicate a feature such
as “eject device” to the end-user. The ICH8 takes no action on the state of this bit
- it is for system software only. For example, if this bit is cleared, and a Hot-Plug
event occurs, the ICH8 still treats it as a proper Hot-Plug event.
Note that these bits are not reset on a HBA reset.
Port Multiplier Attached (PMA) — RO / R/W. When this bit is set, a port
multiplier is attached to the ICH8 for this port. When cleared, a port multiplier is
not attached to this port.
This bit is RO 0 when CAP.PMS (offset ABAR+00h:bit 17) = 0 and R/W when
CAP.PMS = 1.
NOTE: Port Multiplier not supported by ICH8.
Port Multiplier FIS Based Switching Enable (PMFSE) — RO. The ICH8 does not
support FIS-based switching.
NOTE: Port Multiplier not supported by ICH8.
Controller Running (CR) — RO. When this bit is set, the DMA engines for a port
are running. See section 5.2.2 of the Serial ATA AHCI Specification for details on
when this bit is set and cleared by the ICH8.
FIS Receive Running (FR) — RO. When set, the FIS Receive DMA engine for the
port is running. See section 12.2.2 of the Serial ATA AHCI Specification for details
on when this bit is set and cleared by the ICH8.
also be set.
Description
Section 5.16.5
SATA Controller Registers (D31:F2)
Intel
®
for details on the
ICH8 Family Datasheet