NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 390
NH82801HBM S LB9A
Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet
1.NH82801HBM_S_LB9A.pdf
(890 pages)
Specifications of NH82801HBM S LB9A
Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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9.8.2
Table 114.
9.8.2.1
9.8.2.2
390
APM I/O Decode
enabled in the PCI Device 31: Function 0 space (APMDEC_EN), and cannot be moved
(fixed I/O location).
APM Register Map
APM_CNT—Advanced Power Management Control Port
Register
I/O Address:
Default Value:
Lockable:
Power Well:
APM_STS—Advanced Power Management Status Port
Register
I/O Address:
Default Value:
Lockable:
Power Well:
Table 114
Address
7:0
7:0
Bit
Bit
B2h
B3h
Used to pass data between the OS and the SMI handler. Basically, this is a scratchpad
register and is not affected by any other register or function (other than a PCI reset).
Used to pass an APM command between the OS and the SMI handler. Writes to this
port not only store data in the APMC register, but also generates an SMI# when the
APMC_EN bit is set.
shows the I/O registers associated with APM support. This register space is
Mnemonic
APM_CNT
APM_STS
B2h
00h
No
Core
00h
No
Core
B3h
Advanced Power Management Control Port
Advanced Power Management Status Port
Register Name
Description
Description
Attribute:
Size:
Usage:
Attribute:
Size:
Usage:
LPC Interface Bridge Registers (D31:F0)
R/W
8-bit
Legacy Only
R/W
8-bit
Legacy Only
Intel
®
Default
ICH8 Family Datasheet
00h
00h
Type
R/W
R/W
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