NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 234

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

.
Table 93.
234
Command Types
Command
9–FFh
Type
0
1
2
3
4
5
6
7
8
Reserved
WAKE/SMI#. This command wakes the system if it is not already awake. If
system is already awake, an SMI# is generated.
NOTE: The SMB_WAK_STS bit will be set by this command, even if the system is
Unconditional Powerdown. This command sets the PWRBTNOR_STS bit, and
has the same effect as the Powerbutton Override occurring.
HARD RESET WITHOUT CYCLING: This command causes a hard reset of the
system (does not include cycling of the power supply). This is equivalent to a write
to the CF9h register with bits 2:1 set to 1, but bit 3 set to 0.
HARD RESET SYSTEM. This command causes a hard reset of the system
(including cycling of the power supply). This is equivalent to a write to the CF9h
register with bits 3:1 set to 1.
Disable the TCO Messages. This command will disable the Intel
sending Heartbeat and Event messages (as described in
command has been executed, Heartbeat and Event message reporting can only be
re-enabled by assertion and deassertion of the RSMRST# signal.
WD RELOAD: Reload watchdog timer.
Reserved
SMLINK_SLV_SMI. When ICH8 detects this command type while in the S0 state,
it sets the SMLINK_SLV_SMI_STS bit (see
only be used if the system is in an S0 state. If the message is received during S1–
S5 states, the ICH8 acknowledges it, but the SMLINK_SLV_SMI_STS bit does not
get set.
NOTE: It is possible that the system transitions out of the S0 state at the same
Reserved
already awake. The SMI handler should then clear this bit.
time that the SMLINK_SLV_SMI command is received. In this case, the
SMLINK_SLV_SMI_STS bit may get set but not serviced before the system
goes to sleep. Once the system returns to S0, the SMI associated with this
bit would then be generated. Software must be able to handle this scenario.
Description
Section
9.9.5). This command should
Section
Intel
®
Functional Description
ICH8 Family Datasheet
5.15). Once this
®
ICH8 from