NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 704

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NH82801HBM S LB9A

Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet

Specifications of NH82801HBM S LB9A

Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
18.1.9
18.1.10
18.1.11
18.1.12
704
CLS—Cache Line Size Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 0Ch
Default Value:
PLT—Primary Latency Timer Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 0Dh
Default Value:
HEADTYP—Header Type Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 0Eh
Default Value:
BNUM—Bus Number Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 18–1Ah
Default Value:
23:16
15:8
7:0
7:3
2:0
6:0
7:0
Bit
Bit
Bit
Bit
7
Cache Line Size (CLS) — R/W. This is read/write but contains no functionality, per the
PCI Express* Base Specification.
Latency Count. Reserved per the PCI Express* Base Specification.
Reserved
Multi-Function Device — RO.
0 = Single-function device.
1 = Multi-function device.
Configuration Layout— RO. This field is determined by bit 2 of the MPC register
(D28:F0-5, Offset D8h, bit 2).
00h = Host Bridge.
01h = PCI-to-PCI bridge.
Subordinate Bus Number (SBBN) — R/W. Indicates the highest PCI bus number below
the bridge.
Secondary Bus Number (SCBN) — R/W. Indicates the bus number the port.
Primary Bus Number (PBN) — R/W. Indicates the bus number of the backbone.
00h
00h
81h
000000h
Description
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
PCI Express* Configuration Registers
R/W
8 bits
RO
8 bits
RO
8 bits
R/W
24 bits
Intel
®
ICH8 Family Datasheet

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