NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 378

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.8.1.1
378
GEN_PMCON_1—General PM Configuration 1 Register
(PM—D31:F0)
Offset Address: A0h
Default Value:
Lockable:
(Desktop)
(Desktop
(Desktop
(Mobile
(Mobile
(Mobile
15:13
Only)
Only)
Only)
Only)
Only)
Bit
12
12
11
11
10
9
8
7
7
Reserved
Reserved
C4 Disable: This bit disables the C4 feature.
0 = Enables C4
1 = Disables C4
Reserved
C5_Enable: This bit enables the C5 and C6 features. When this bit is 0, the
platform does not enable the C5 and C6 features. When this bit is 1, the platform
enables C5/C6 features.
This bit also, along with GPIO_USE_SEL[0] bit, enables selection of BM_BUSY#/
PMSYNC# function on ICH pin as shown below:
When this bit is 0:
BIOS_PCI_EXP_EN — R/W. This bit acts as a global enable for the SCI associated
with the PCI Express* ports.
0 = The various PCI Express ports and (G)MCH cannot cause the PCI_EXP_STS bit
1 = The various PCI Express ports and (G)MCH can cause the PCI_EXP_STS bit to
PWRBTN_LVL — RO. This bit indicates the current state of the PWRBTN# signal.
0 = Low.
1 = High.
Reserved
Reserved
Enter C4 When C3 Invoked (C4onC3_EN) — R/W. If this bit is set, then when
software does a LVL3 read, the ICH8 transitions to the C4 state.
• The R/W bits of the C5 Exit Timing Register become scratchpad with no effect on hardware
• I/O Reads to the LVL5 and LVL6 registers will be retired normally, but with no other action.
• All attempts to enter deeper C-States that require a transition through the C5 timing logic
GPIO_USE_SEL[0]
functions.
will be ignored.
to go active.
go active.
0000h
No
1
0
0
C5_Enable
X
0
1
Description
Attribute:
Size:
Usage:
Power Well:
BM_BUSY#
LPC Interface Bridge Registers (D31:F0)
PMSYNC#
Result
GPIO
R/W, RO, R/WO
16-bit
ACPI, Legacy
Core
Intel
®
ICH8 Family Datasheet