NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 594

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.1.19
594
PWR_CNTL_STS—Power Management Control/
Status Register (USB EHCI—D29:F7, D26:F7)
Address Offset: 54h
Default Value:
NOTE: Reset (bits 15, 8): suspend well, and not D3-to-D0 warm reset nor core well reset.
14:13
12:9
7:2
1:0
Bit
15
8
PME Status — R/WC.
0 = Writing a 1 to this bit will clear it and cause the internal PME to deassert (if
1 = This bit is set when the ICH8 EHC would normally assert the PME# signal
NOTE: This bit must be explicitly cleared by the operating system each time the
Data Scale — RO. Hardwired to 00b indicating it does not support the associated Data
register.
Data Select — RO. Hardwired to 0000b indicating it does not support the associated
Data register.
PME Enable — R/W.
0 = Disable.
1 = Enable. Enables Intel
NOTE: This bit must be explicitly cleared by the operating system each time it is
Reserved
Power State — R/W. This 2-bit field is used both to determine the current power state
of EHC function and to set a new power state. The definition of the field values are:
00 = D0 state
11 = D3
If software attempts to write a value of 10b or 01b in to this field, the write operation
must complete normally; however, the data is discarded and no state change occurs.
When in the D3
range; but the configuration space must still be accessible. When not in the D0 state,
the generation of the interrupt output is blocked. Specifically, the PIRQH is not asserted
by the ICH8 when not in the D0 state.
When software changes this value from the D3
warm (soft) reset is generated, and software must re-initialize the function.
enabled).
independent of the state of the PME_En bit.
PME_Status is 1.
operating system is loaded.
initially loaded.
HOT
0000h
state
–
55h
HOT
state, the ICH8 must not accept accesses to the EHC memory
®
ICH8 EHC to generate an internal PME signal when
Description
Attribute:
Size:
EHCI Controller Registers (D29:F7, D26:F7)
HOT
state to the D0 state, an internal
R/W, R/WC, RO
16 bits
Intel
®
ICH8 Family Datasheet