NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 525

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NH82801HBM S LB9A

Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet

Specifications of NH82801HBM S LB9A

Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SATA Controller Registers (D31:F2)
12.4.2.3
12.4.2.4
Intel
®
ICH8 Family Datasheet
PxFB—Port [5:0] FIS Base Address Register (D31:F2)
Address Offset: Port 0: ABAR + 108h
Default Value:
PxFBU—Port [5:0] FIS Base Address Upper 32-Bits
Register (D31:F2)
Address Offset: Port 0: ABAR + 10Ch
Default Value:
31:8
31:3
7:0
2:0
Bit
Bit
FIS Base Address (FB) — R/W. Indicates the 32-bit base for received FISes. The
structure pointed to by this address range is 256 bytes in length. This address must be
256-byte aligned, as indicated by bits 31:3 being read/write.
Note that these bits are not reset on a HBA reset.
Reserved — RO
Command List Base Address Upper (CLBU) — R/W. Indicates the upper 32-bits for
the received FIS base for this port.
Note that these bits are not reset on a HBA reset.
Reserved
Port 1: ABAR + 188h
Port 2: ABAR + 208h
Port 3: ABAR + 284h (Desktop Only)
Port 4: ABAR + 304h (Desktop Only)
Port 5: ABAR + 384h (Desktop Only)
Undefined
Port 1: ABAR + 18Ch
Port 2: ABAR + 20Ch
Port 3: ABAR + 28Ch
Port 4: ABAR + 30Ch
Port 5: ABAR + 38Ch
Undefined
Description
Description
Attribute:
Size:
Attribute:
Size:
R/W, RO
32 bits
R/W
32 bits
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