NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 776

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20.2.5.8
20.3
Table 144.
776
OEM Section
Memory Address:F00h
Default Value:
256 Bytes are reserved at the top of the Flash Descriptor for use by OEM. The
information stored by the OEM can only be written during the manufacturing process as
the Flash Descriptor read/write permissions must be set to Read Only when the
computer leaves the manufacturing floor. The ICH Flash controller does not read this
information. FFh is suggested to reduce programming time.
GbE SPI Flash Program Registers
The GbE Flash registers are memory-mapped with a base address GLBAR found in the
GbE LAN register chapter Device 25: Function 0: Offset 18h. (MBARC Register). The
individual registers are then accessible at GLBAR + Offset as indicated in
These memory-mapped registers must be accessed in byte, word, or DWord quantities.
Gigabit LAN SPI Flash Program Register Address Map
(GbE LAN Memory Mapped Configuration Registers)
GLBAR +
08h–0Bh
58h–5Bh
78h–7Bh
A0h–DFh
00h–03h
04h–05h
06h–07h
0Ch–0Fh
10h–13h
14h–4Fh
50h–53h
54h–57h
60h–63h
64h–73h
74h–77h
7Ch–8Fh
91h–93h
94h–95h
96h–97h
98h–9Fh
5Ch–5F
Offset
90h
Mnemonic
Reserved
OPMENU
FDATA0
OPTYPE
FADDR
FRACC
FREG0
FREG1
FREG2
FREG3
PREOP
GLFPR
HSFS
HSFC
FPR0
SSFS
SSFC
FPR1
—d
—
—
—
Gigabit LAN Flash Primary Region
Hardware Sequencing Flash Status
Hardware Sequencing Flash Control
Flash Address
Reserved
Flash Data 0
Reserved
Flash Region Access Permissions
Flash Region 0
Flash Region 1
Flash Region 2
Flash Region 3
Reserved for Future Flash Regions
Flash Protected Range 0
Reserved
Software Sequencing Flash Status
Software Sequencing Flash Control
Prefix Opcode Configuration
Opcode Type Configuration
Opcode Menu Configuration
Reserved
Flash Protected Range 1
Register Name
Attribute:
Size:
Serial Peripheral Interface (SPI)
256 Bytes
Intel
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
Default
0000h
0000h
0000h
0000h
0000h
0000h
®
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—
ICH8 Family Datasheet
Table
R/W, R/WS
RO, R/WC
RO, R/WL
RO, R/W,
Access
R/WL
R/WL
R/WL
R/WL
144.
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
—
—
—
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