NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 772

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20.2.5.2
772
NOTES:ICH8M supports 3 TCO modes.
1.
2.
3.
STRP1—Strap 1 Register
(Flash Descriptor Memory Mapped Configuration Registers)
Memory Address:FMSBA + 000h
31:1
Bits
Bits
6:1
7
0
0
Legacy TCO mode: Selection through STRAP0 BIT 7
Advanced TCO pro-active mode: Selection through STRAP0 BIT 7 and BIT15=0
Advanced TCO BMC mode: Selection through STRAP0 BIT 7 and BIT15=1
Default
Default
0
1
0
0
1
Reserved
ME Disable B(MDB):
0 = ME is enabled
1 = ME is disabled
NOTE:
TCO Mode (TCOMODE): This field configures the location of the TCO slave
and also enables/disables the Intel AMT SMBus Controller 1.
0 = Legacy/Compatible Mode: In this mode the TCO slave is Multiplexed
1 = Advanced TCO Mode: In this mode the TCO slave is Multiplexed onto
The value of this strap is reflected in bit 1 of the SMBus Auxiliary Status
(Section
SMBASE + 0Ch, bit 1).
Reserved
ME Disable (ME_DISABLE):
0 = ME is enabled
1 = ME is disabled
NOTE:
onto the SMLink pins. The Intel AMT SMBus Controller 1 is disabled.
the SMBus pins. The Intel AMT SMBus Controller 1 is enabled. The Intel
AMT SMBus Controller 1 configuration is set by BMCMODE bit 15.
This bit and bit 0 of
order to disable ME on the platform.
This bit and bit 0 of
disable
16.2.11: AUX_STS – Auxiliary Status Register (SMBUS: D31:F3:
Management Engine
Section 20.2.5.1
Section 20.2.5.2
Size:
Description
Description
on the platform.
(FMSBA+000h) must be set to 1 in
(FMSBA+000h) must be set to 1 to
Serial Peripheral Interface (SPI)
32 bits
Intel
®
ICH8 Family Datasheet