NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 762

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20.1.24
762
VSCC—Vendor Specific Component Capabilities Register
(
Memory Address:SPIBAR + C1h
Default Value:
15:8
3
2
1:0
22:16
SPI Memory Mapped Configuration Registers
7:4
Bit
23
Vendor Component Lock (VCL): — R/W:
0 = The lock bit is not set
1 = The Vendor Component Lock bit is set.
This register locks itself when set.
Reserved
Erase Opcode (EO) — R/W: This register is programmed with the Flash erase
instruction opcode required by the vendor’s Flash component.
NOTE: If there is more than one component, both components must use the same
This register is locked by the Vendor Component Lock (VCL) bit.
Reserved
Write Status Required (WSR) — R/W
0 = No Enable write to the status register (50h) opcode is required to write to the SPI
1 = Enable write to the status register (50h) opcode is required to write to the SPI flash
NOTE: If there is more than one component, both components must use the same
Write Granularity (WG) — R/W:
0 = 1 Byte
1 = 64 Byte
This register is locked by the Vendor Component Lock (VCL) bit.
NOTE: If more than one Flash component exists, this field must be set to the lowest
Block/Sector Erase Size (BSES)— R/W: This field identifies the erasable sector size
for all Flash components.
00 = 256 Byte
01 = 4 KB
10 =Reserved for future use
11 = 64 KB
This register is locked by the Vendor Component Lock (VCL) bit.
NOTE: If supporting more than one Flash component, all flash components must have
This register is locked by the Vendor Component Lock (VCL) bit.
Hardware takes no action based on the value of this register. The contents of this
register are to be used only by software and can be read in the HSFSTS.BERASE
register in both the BIOS and the GbE program registers.
flash Status Register(s) prior to write or erase to remove SPI flash protection.
Status Register(s) prior to write or erase to remove SPI flash protection.
Erase Opcode.
Write Status Required setting. SPI Protection is removed by writing 00h to SPI
flash Status Register(s).
common write granularity of the different Flash components.
identical Block/Sector erase sizes.
00000000h
Description
Attribute:
Size:
)
Serial Peripheral Interface (SPI)
RO, R/WL
32 bits
Intel
®
ICH8 Family Datasheet