NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 362
NH82801HBM S LB9A
Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet
1.NH82801HBM_S_LB9A.pdf
(890 pages)
Specifications of NH82801HBM S LB9A
Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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362
ELCR1—Master Controller Edge/Level Triggered Register
(LPC I/F—D31:F0)
Offset Address: 4D0h
Default Value:
In edge mode, (bit[x] = 0), the interrupt is recognized by a low to high transition. In
level mode (bit[x] = 1), the interrupt is recognized by a high level. The cascade
channel, IRQ2, the heart beat timer (IRQ0), and the keyboard controller (IRQ1),
cannot be put into level mode.
2:0
Bit
7
6
5
4
3
IRQ7 ECL — R/W.
0 = Edge.
1 = Level.
IRQ6 ECL — R/W.
0 = Edge.
1 = Level.
IRQ5 ECL — R/W.
0 = Edge.
1 = Level.
IRQ4 ECL — R/W.
0 = Edge.
1 = Level.
IRQ3 ECL — R/W.
0 = Edge.
1 = Level.
Reserved. Must be 0.
00h
Description
Attribute:
Size:
LPC Interface Bridge Registers (D31:F0)
R/W
8 bits
Intel
®
ICH8 Family Datasheet
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