NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 752

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20.1.7
20.1.8
752
FRAP—Flash Regions Access Permissions Register
(
Memory Address:SPIBAR + 50h
Default Value:
FREG0—Flash Region 0 (Flash Descriptor) Register
(
Memory Address:SPIBAR + 54h
Default Value:
31:29
28:16
15:13
12:0
31:24
23:16
SPI Memory Mapped Configuration Registers
SPI Memory Mapped Configuration Registers
15:8
7:0
Bit
Bit
BIOS Master Write Access Grant (BMWAG): — R/WL. Each bit [31:29] corresponds
to Master[7:0]. BIOS can grant one or more masters write access to the BIOS region 1
overriding the permissions in the Flash Descriptor.
Master[1] is Host CPU/BIOS, Master[2] is ME, Master[3] is Host CPU/GbE. Master[0]
and Master[7:4] are reserved.
The contents of this register are locked by the FLOCKDN bit.
BIOS Master Read Access Grant (BMRAG): — R/WL. Each bit [28:16] corresponds
to Master[7:0]. BIOS can grant one or more masters read access to the BIOS region 1
overriding the read permissions in the Flash Descriptor.
Master[1] is Host CPU/BIOS, Master[2] is ME, Master[3] is Host CPU/GbE. Master[0]
and Master[7:4] are reserved.
The contents of this register are locked by the FLOCKDN bit
BIOS Region Write Access (BRWA): — RO. Each bit [15:8] corresponds to Regions
[7:0]. If the bit is set, this master can erase and write that particular region through
register accesses.
The contents of this register are that of the Flash Descriptor. Flash Master 1 Master
Region Write Access OR a particular master has granted BIOS write permissions in their
Master Write Access Grant register or the Flash Descriptor Security Override strap is
set.
BIOS Region Read Access (BRRA): — RO. Each bit [7:0] corresponds to Regions
[7:0]. If the bit is set, this master can read that particular region through register
accesses.
The contents of this register are that of the Flash Descriptor.Flash Master 1.Master
Region Write Access OR a particular master has granted BIOS read permissions in their
Master Read Access Grant register or the Flash Descriptor Security Override strap is
set.
Reserved
Region Limit (RL): — RO. This field specifies address bits 24:12 for the Region 0
Limit.
The value in this register is loaded from the contents in the Flash
Descriptor.FLREG0.Region Limit
Reserved
Region Base (RB) / Flash Descriptor Base Address Region (FDBAR): — RO. This
field specifies address bits 24:12 for the Region 0 Base.
The value in this register is loaded from the contents in the Flash
Descriptor.FLREG0.Region Base
00000202h
00000000h
Description
Description
Attribute:
Size:
Attribute:
Size:
)
)
Serial Peripheral Interface (SPI)
RO, R/WL
32 bits
RO
32 bits
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®
ICH8 Family Datasheet