MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 14
![MOD5234 10/100 ETHERNET MODULE](/photos/28/91/289101/mod-100ir_sml.jpg)
MOD5234-100IR
Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(3 pages)
2.MOD5234-100IR.pdf
(4 pages)
3.MOD5234-100IR.pdf
(754 pages)
Specifications of MOD5234-100IR
Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
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14.1
14.1.1
14.1.2
14.2
14.3
14.3.1
14.3.2
14.3.3
14.3.4
14.3.4.1
14.3.5
14.4
14.4.1
14.4.2
14.4.3
14.4.3.1
14.4.3.2
14.4.4
14.4.4.1
14.4.4.2
14.4.4.3
14.4.5
15.1
15.2
15.3
15.4
15.4.1
15.4.1.1
15.4.1.2
15.4.1.3
15.4.1.4
15.4.1.5
15.4.1.6
xiv
Paragraph
Number
Introduction ................................................................................................................... 14-1
DMA Transfer Overview .............................................................................................. 14-3
Memory Map/Register Definition ................................................................................ 14-4
Functional Description ................................................................................................ 14-12
Introduction ................................................................................................................... 15-1
Low-Power Mode Operation ........................................................................................ 15-1
Interrupt/General-Purpose I/O Pin Descriptions ........................................................... 15-2
Memory Map/Register Definition ................................................................................ 15-2
Overview ................................................................................................................... 14-1
Features ..................................................................................................................... 14-2
DMA Request Control (DMAREQC) ...................................................................... 14-5
Source Address Registers (SAR0–SAR3) ................................................................ 14-6
Destination Address Registers (DAR0–DAR3) ....................................................... 14-7
Byte Count Registers (BCR0–BCR3) and DMA Status Registers (DSR0–DSR3) . 14-7
DMA Control Registers (DCR0–DCR3) .................................................................. 14-9
Transfer Requests (Cycle-Steal and Continuous Modes) ....................................... 14-13
Dual-Address Data Transfer Mode ......................................................................... 14-13
Channel Initialization and Startup .......................................................................... 14-14
Data Transfer .......................................................................................................... 14-15
Termination ............................................................................................................. 14-19
Register Description ................................................................................................. 15-3
DMA Status Registers (DSR0–DSR3) ................................................................. 14-8
Channel Prioritization ......................................................................................... 14-14
Programming the DMA Controller Module ....................................................... 14-14
External Request and Acknowledge Operation .................................................. 14-15
Auto-Alignment .................................................................................................. 14-18
Bandwidth Control .............................................................................................. 14-19
EPORT Pin Assignment Register (EPPAR) ......................................................... 15-3
EPORT Data Direction Register (EPDDR) .......................................................... 15-4
Edge Port Interrupt Enable Register (EPIER) ...................................................... 15-5
Edge Port Data Register (EPDR) .......................................................................... 15-5
Edge Port Pin Data Register (EPPDR) ................................................................. 15-6
Edge Port Flag Register (EPFR) ........................................................................... 15-6
Edge Port Module (EPORT)
MCF5235 Reference Manual, Rev. 2
DMA Controller Module
Contents
Chapter 14
Chapter 15
Title
Freescale Semiconductor
Number
Page
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