MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 534
MOD5234-100IR
Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(3 pages)
2.MOD5234-100IR.pdf
(4 pages)
3.MOD5234-100IR.pdf
(754 pages)
Specifications of MOD5234-100IR
Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
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UART Modules
The serial communication channel provides a full-duplex asynchronous/synchronous receiver and
transmitter deriving an operating frequency from the internal bus clock or an external clock using
the timer pin. The transmitter converts parallel data from the CPU to a serial bit stream, inserting
appropriate start, stop, and parity bits. It outputs the resulting stream on the channel transmitter
serial data output (UnTXD). See
The receiver converts serial data from the channel receiver serial data input (UnRXD) to parallel
format, checks for a start, stop, and parity bits, or break conditions, and transfers the assembled
character onto the bus during read operations. The receiver may be polled, interrupt driven, or use
DMA requests for servicing. See
26.1.2
The MCF5235 contains three independent UART modules with the following features:
26-2
• Each can be clocked by an external clock or by the internal bus clock (eliminating a need
• Full-duplex asynchronous/synchronous receiver/transmitter channel
• Quadruple-buffered receiver
• Double-buffered transmitter
• Independently programmable receiver and transmitter clock sources
• Programmable data format:
• Each channel programmable to normal (full-duplex), automatic echo, local loop-back, or
• Automatic wake-up mode for multidrop applications
• Four maskable interrupt conditions
• All three UARTs have DMA request capability
• Parity, framing, and overrun error detection
for an external UART clock).
— 5–8 data bits plus parity
— Odd, even, no parity, or force parity
— One, one-and-a-half, or two stop bits
remote loop-back mode
Features
UARTn can be clocked by the DTnIN pin. However, if the timers are
used, then input capture mode is not available for that timer.
The GPIO module must be configured to enable the peripheral
function of the appropriate pins (refer to
Purpose I/O
Module”) prior to configuring the UART module.
Section 26.4.2.1,
Section 26.4.2.2,
MCF5235 Reference Manual, Rev. 2
NOTE
NOTE
“Transmitter.”
“Receiver.”
Chapter 12, “General
Freescale Semiconductor
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