MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 72

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

Signal Descriptions
2.3.11 Queued Serial Peripheral Interface (QSPI)
Table 2-12
2.3.12 UART Module Signals
The UART modules use the signals in this section for data. The baud rate clock inputs are not
supported.
2-14
QSPI Syncrhonous
Serial Output
QSPI Synchronous
Serial Data Input
QSPI Serial Clock
Synchronous
Peripheral Chip Selects
Transmit Serial Data
Output
Receive Serial Data
Input
Signal Name
Signal Name
describes QSPI signals.
Table 2-12. Queued Serial Peripheral Interface (QSPI) Signals
QSPI_DOUT
QSPI_DIN
QSPI_CLK
QSPI_CS[1:0] Provide QSPI peripheral chip selects that can be programmed to be
U2TXD/U1TXD
/U0TXD
U2RXD/U1RX
D/U0RXD
Abbreviation
Abbreviation
Table 2-13. UART Module Signals
MCF5235 Reference Manual, Rev. 2
Provides the serial data from the QSPI and can be programmed to be
driven on the rising or falling edge of QSPI_CLK. Each byte is sent
msb first.
Provides the serial data to the QSPI and can be programmed to be
sampled on the rising or falling edge of QSPI_CLK. Each byte is
written to RAM lsb first.
Provides the serial clock from the QSPI. The polarity and phase of
QSPI_CLK are programmable. The output frequency is programmed
according to the following formula, in which n can be any value
between 1 and 255:
active high or low. QSPI_CS1 can also be configured as SDRAM
clock enable signal SD_CKE.
Transmitter serial data outputs for the UART modules. The output is
held high (mark condition) when the transmitter is disabled, idle, or in
the local loopback mode. Data is shifted out, lsb first, on this pin at the
falling edge of the serial clock source.
U1TXD can also be configured as Controller Area Network Transmit
data output CAN0TX.
U2TXD can also be configured as Controller Area Network Transmit
data output CAN1TX.
Receiver serial data inputs for the UART modules. Data received on
this pin is sampled on the rising edge of the serial clock source lsb
first. When the UART clock is stopped for power-down mode, any
transition on this pin restarts it.
U1RXD can also be configured as Controller Area Network Transmit
data input CAN0RX.
U2RXD can also be configured as Controller Area Network Transmit
data output CAN1RX.
SPI_CLK = f
Function
Function
sys/2
÷ (2 × n)
Freescale Semiconductor
I/O
I/O
O
O
O
O
I
I