MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 263

MOD5234 10/100 ETHERNET MODULE

MOD5234-100IR

Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr

Specifications of MOD5234-100IR

Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
Reading a PPDSDR_x register returns the current state of the corresponding pins when configured
as general purpose I/O, regardless of whether the pins are inputs or outputs.
Every GPIO port has a PPDSDR_x register and a clear register (PCLRR_x) for setting or clearing
individual bits in the PODR_x register.
Initial pin output drive strength is determined during reset configuration. The DSCR_x registers
allow the pin drive strengths to be configured on a per-function basis after reset.
The MCF5235 ports module does not generate interrupt requests.
12.4.2 Port Digital I/O Timing
Input data on all pins configured as general purpose input is synchronized to the rising edge of the
internal bus clock, CLKOUT, as shown in
Data written to the PODR_x register of any pin configured as a general purpose output is
immediately driven to its respective pin, as shown in
12.5
The initialization for the MCF5235 ports module is done during reset configuration. All registers
are reset to a predetermined state. Refer to
more details on reset and initialization.
Freescale Semiconductor
CLKOUT
Output Data
Initialization/Application Information
Output Pin
Pin Data
Register
CLKOUT
Register
Input
Pin
Figure 12-51. General Purpose Output Timing
Figure 12-50. General Purpose Input Timing
MCF5235 Reference Manual, Rev. 2
Figure
Section 12.3, “Memory Map/Register
12-50.
Figure
12-51.
Initialization/Application Information
Definition,” for
12-35

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