MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 478

MOD5234 10/100 ETHERNET MODULE

MOD5234-100IR

Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr

Specifications of MOD5234-100IR

Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
FlexCAN
The first write to the control/status word is important in case there was pending reception or
transmission. The write operation immediately deactivates the MB, removing it from any currently
ongoing arbitration or ID matching processes, giving time for the CPU to program the rest of the
MB (see
step, it will participate in the arbitration process and eventually be transmitted according to its
priority. At the end of the successful transmission, the value of the free running timer (TIMERn)
is written into the message buffer’s Time Stamp field, the Code field in the Control and Status
word is updated, a status flag is set in the IFLAGn register and an interrupt is generated if allowed
by the corresponding IMASKn register bit. The new Code field after transmission depends on the
code that was used to activate the MB in step four (see
21.4.2 Arbitration Process
The arbitration process is an algorithm executed by the message buffer management (MBM) that
scans the entire MB memory looking for the highest priority message to be transmitted. All MBs
programmed as transmit buffers will be scanned to find the lowest ID or the lowest MB number,
depending on the CANCTRLn[LBUF] bit.
The arbitration process is triggered in the following events:
Once the highest priority MB is selected, it is transferred to a temporary storage space called serial
message buffer (SMB), which has the same structure as a normal MB but is not user accessible.
This operation is called “move-out.” At the first opportunity window on the CAN bus, the message
on the SMB is transmitted according to the CAN protocol rules. FlexCAN transmits up to eight
21-24
3. Writing the data bytes.
4. Writing the control/status word (active CODE, LENGTH).
• During the CRC field of the CAN frame
• During the error delimiter field of the CAN frame
• During intermission, if the winner MB defined in a previous arbitration was deactivated, or
• When MBM is in idle or bus off state and the CPU writes to the C/S word of any MB
• Upon leaving freeze mode
if there was no MB to transmit, but the CPU wrote to the C/S word of any MB after the
previous arbitration finished
Section 21.4.5.2, “Message Buffer
The first and last steps are mandatory!
If CANCTRLn[LBUF] is cleared, the arbitration considers not only
the ID, but also the RTR and IDE bits placed inside the ID at the same
positions they are transmitted in the CAN frame.
MCF5235 Reference Manual, Rev. 2
Deactivation”). Once the MB is activated in the fourth
NOTE
NOTE
Table
21-14).
Freescale Semiconductor

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