MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 191

MOD5234 10/100 ETHERNET MODULE

MOD5234-100IR

Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr

Specifications of MOD5234-100IR

Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
9.2.3
If the external RCON pin is asserted during reset, then the states of these data pins during reset
determine the chip mode of operation, boot device, clock mode, and certain module configurations
after reset.
9.3
This subsection provides a description of the memory map and registers.
9.3.1
The CCM programming model consists of these registers:
Some control register bits are implemented as write-once bits. These bits are always readable, but
once the bit has been written, additional writes have no effect, except during debug and test
operations.
Some write-once bits can be read and written while in debug mode. When debug mode is exited,
the chip configuration module resumes operation based on the current register values. If a write to
a write-once register bit occurs while in debug mode, the register bit remains writable on exit from
debug or test mode.
9.3.2
Freescale Semiconductor
• The chip configuration register (CCR) controls the main chip configuration.
• The reset configuration register (RCON) indicates the default chip configuration.
• The chip identification register (CIR) contains a unique part number.
IPSBAR Offset
0x11_000C
0x11_0004
0x11_0008
0x11_0010
D[25:24, 21:19, 16] (Reset Configuration Override)
Memory Map/Register Definition
Programming Model
Memory Map
Reset Configuration Register (RCON)
Table 9-2
Chip Configuration Register (CCR)
Table 9-2. Write-Once Bits Read/Write Accessibility
Table 9-3. Chip Configuration Module Memory Map
[31:24]
All configurations
Debug operation
Configuration
Master mode
shows the accessibility of write-once bits.
MCF5235 Reference Manual, Rev. 2
[23:16]
Unimplemented
Reserved
Low-Power Control Register (LPCR)
3
Chip Identification Register (CIR)
4
[15:8]
Read/Write Access
Read-always
Write-always
Write-once
Memory Map/Register Definition
[7:0]
2
Access
S
S
S
1
9-3

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