MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 333

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

Data Transfer Operation
S0
S1
S2
S3
S4
S5
S0
S1
S2
S3
S4
S5
CLKOUT
A[31:0], TSIZ[1:0]
R/W
TIP
TS
CSn, BSn
OE
D[31:0]
Read
Write
TA
Figure 17-11. Back-to-Back Bus Cycles
Basic read and write cycles are used to show a back-to-back cycle, but there is no restriction as to
the type of operations to be placed back to back. The initiation of a back-to-back cycle is not user
definable.
17.5.7 Burst Cycles
The MCF5235 can be programmed to initiate burst cycles if its transfer size exceeds the size of
the port it is transferring to. For example, a word transfer to an 8-bit port would take a 2-byte burst
cycle. A line transfer to a 32-bit port would take a 4-longword burst cycle.
The MCF5235 bus can support 2-1-1-1 burst cycles to maximize cache performance and optimize
DMA transfers. A user can add wait states by delaying termination of the cycle. The initiation of
a burst cycle is encoded on the size pins. For burst transfers to smaller port sizes, TSIZ[1:0]
indicates the size of the entire transfer. For example, if the MCF5235 writes a longword to an 8-bit
port, TSIZ[1:0] = 00 for the first byte transfer and does not change.
The CSCRs can be used to enable bursting for reads, writes, or both. MCF5235 memory space can
be
declared
burst-inhibited
for
reads
and
writes
by
clearing
the
appropriate
CSCRn[BSTR,BSTW]. A line access to a burst-inhibited region first accesses the MCF5235 bus
encoded as a line access. The TSIZ[1:0] encoding does not exceed the programmed port size. The
address changes if internal termination is used but does not change if external termination is used,
as shown in
Figure 17-12
and
Figure
17-13.
MCF5235 Reference Manual, Rev. 2
Freescale Semiconductor
17-11