MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 186
![MOD5234 10/100 ETHERNET MODULE](/photos/28/91/289101/mod-100ir_sml.jpg)
MOD5234-100IR
Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(3 pages)
2.MOD5234-100IR.pdf
(4 pages)
3.MOD5234-100IR.pdf
(754 pages)
Specifications of MOD5234-100IR
Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
- Current page: 186 of 754
- Download datasheet (13Mb)
Power Management
8.3.2.23 JTAG
The JTAG (Joint Test Action Group) controller logic is clocked using the TCLK input and is not
affected by the system clock. The JTAG cannot generate an event to cause the CPU to exit any
low-power mode. Toggling TCLK during any low-power mode will increase the system current
consumption.
8.3.3
The functionality of each of the peripherals and CPU during the various low-power modes is
summarized in
the peripheral automatically assumes when the STOP instruction is executed and the
LPCR[LPMD] field is set for the particular low-power mode. Individual peripherals may be
disabled by programming its dedicated control bits. The wakeup capability field refers to the
ability of an interrupt or reset by that peripheral to force the CPU into run mode.
8-12
CPU
SRAM
System Control Module
SDRAM Controller
Chip Select Module
DMA Controller
UART0, UART1 and UART2
I
QSPI
DMA Timers
Interrupt controller
Fast Ethernet Controller
I/O Ports
Reset Controller
Chip Configuration Module
Power Management
Clock Module
Edge port
Watchdog timer
2
C Module
Summary of Peripheral State During Low-Power Modes
Table
Module
Table 8-5. CPU and Peripherals in Low-Power Modes
8-5. The status of each peripheral during a given mode refers to the condition
MCF5235 Reference Manual, Rev. 2
Program
Stopped
Stopped
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Wait Mode
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Peripheral Status
No
No
No
No
No
No
No
2
2
2
2
2
2
3
2
2
3
3
Program
Stopped
Stopped
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Doze Mode
1
/ Wakeup Capability
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
2
2
2
2
2
2
3
2
2
3
3
Stopped
Stopped
Stopped
Stopped
Stopped
Stopped
Stopped
Stopped
Stopped
Stopped
Enabled
Stopped
Enabled
Enabled
Stopped
Stopped
Enabled
Stopped
Stopped
Freescale Semiconductor
Stop Mode
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
2
3
2
2
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