MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 250

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

General Purpose I/O Module
12-22
11–10
Bits
15
14
13
12
9
8
7
6
5
4
PAR_TSIZ1 TSIZ[1] Pin Assignment Bits
PAR_TSIZ0 TSIZ[0] Pin Assignment Bit
PAR_RWB R/W Pin Assignment Bit
PAR_TEA
PAR_OE
PAR_TA
Name
—
—
—
—
—
Table 12-10. PAR_BUSCTL Field Descriptions
Reserved, should be cleared.
OE Pin Assignment Bit
The PAR_OE bit configures the OE pin for its primary function or GPIO.
0 OE pin configured for GPIO
1 OE pin configured for external bus OE function
Reserved, should be cleared.
TA pin assignment. The PAR_TA bit configures the OE pin for its primary function or GPIO.
0 TA pin configured for GPIO
1 TA pin configured for external bus TA function
TEA pin assignment. The PAR_TEA field configures the TEA pin for its primary functions
or GPIO.
0x TEA pin configured for general purposeI/O
10 TEA pin configured for DMA request 1 (DREQ1) function
11 TEA pin configured for external bus TEA function
Reserved, should be cleared
The PAR_RWB bit configures the R/W pin for its primary function or GPIO.
0 R/W pin configured for GPIO
1 R/W pin configured for external bus read/write function
Reserved, should be cleared
The PAR_TSIZ1 bit configures the TSIZ[1] pin for its primary functions or GPIO.
0 TSIZ[1] pin configured for GPIO
1 TSIZ[1] pin configured for external bus TSIZ1 function or DMA acknowledge 1 function
NOTE: The selection between the TSIZ function and DMA function on each of the
TSIZ[1:0] pins is determined by the value of the SZEN field in the CIM chip configuration
register. Please refer to the
information on chip configuration and the SZEN bit.
Reserved, should be cleared
The PAR_TSIZ0 bit configures the TSIZ[0] pin for its primary functions or GPIO.
0 TSIZ[0] pin configured for GPIO
1 TSIZ[0] pin configured for external bus TSIZ0 function or DMA acknowledge 0 function
NOTE: The selection between the TSIZ function and DMA function on each of the
TSIZ[1:0] pins is determined by the value of the SZEN field in the CIM chip configuration
register. Please refer to the
information on chip configuration and the SZEN bit.
MCF5235 Reference Manual, Rev. 2
Chapter 9, “Chip Configuration Module
Chapter 9, “Chip Configuration Module (CCM)”
Description
(CCM)” for more
Freescale Semiconductor
for more