MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 487

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

For any configuration change/initialization, the FlexCAN must be in freeze mode (see
Section 21.1.3.2, “Freeze
the FlexCAN module:
21.5.1 Interrupts
There are three interrupt sources for the FlexCAN module. A combined interrupt for all 16 MBs
is generated by combining all the interrupt sources from MBs. This interrupt gets generated when
any of the 16 MB interrupt sources generates a interrupt. In this case, the CPU must read the
IFLAGn register to determine which MB caused the interrupt. The other two interrupt sources (bus
off and error) act in the same way, and are located in the ERRSTATn register. The bus off and error
interrupt mask bits are located in the CANCTRLn register.
Freescale Semiconductor
1. Initialize all operation modes in the CANCTRLn register.
2. Initialize message buffers
3. Initialize RXGMASKn, RX14MASKn, and RX15MASKn registers for acceptance mask
4. Initialize FlexCAN interrupt handler
5. Clear the CANMCRn[HALT] bit. At this point, the FlexCAN will attempt to synchronize
a) Initialize the bit timing parameters PROPSEG, PSEGS1, PSEG2, and RJW
b) Select the S-clock rate by programming the PRESDIV field.
c) Select the internal arbitration mode via the LBUF bit.
a) The control/status word of all message buffers must be written either as an active or
b) All other entries in each message buffer should be initialized as required.
as needed
a) Initialize the interrupt controller registers for any needed interrupts. See
b) Set the required mask bits in the IMASKn register (for all message buffer interrupts)
with the CAN bus.
inactive message buffer.
“Interrupt Controller
and the CANCTRLn (for bus off and error interrupts).
Mode”). The following is a generic initialization sequence applicable to
Modules,” for more information.
MCF5235 Reference Manual, Rev. 2
FlexCAN Initialization Sequence
Chapter 13,
21-33