MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 688

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

Debug Support
contained within a single aligned longword, the processor may never grant the internal bus to the
debug module, for example:
label1: nop
or
label2: bra.w label2
The processor grants the internal bus if these loops are forced across two longwords.
32.7
This section specifies the ColdFire processor and debug module’s generation of the processor
status (PST) and debug data (DDATA) output on an instruction basis. In general, the PST/DDATA
output for an instruction is defined as follows:
where the {...} definition is optional operand information defined by the setting of the CSR.
The CSR provides capabilities to display operands based on reference type (read, write, or both).
A PST value {0x8, 0x9, or 0xB} identifies the size and presence of valid data to follow on the
DDATA output {1, 2, or 4 bytes}. Additionally, for certain change-of-flow branch instructions,
CSR[BTB] provides the capability to display the target instruction address on the DDATA output
{2, 3, or 4 bytes} using a PST value of {0x9, 0xA, or 0xB}.
32.7.1
Table 32-23
{Dn, An} register. In this definition, the ‘y’ suffix generally denotes the source and ‘x’ denotes the
destination operand. For a given instruction, the optional operand data is displayed only for those
effective addresses referencing memory. The ‘DD’ nomenclature refers to the DDATA outputs.
32-44
Instruction
addq.l
addx.l
addi.l
add.l
add.l
and.l
align4
bra.b label1
align4
Processor Status, DDATA Definition
User Instruction Set
shows the PST/DDATA specification for user-mode instructions. Rn represents any
Table 32-23. PST/DDATA Specification for User-Mode Instructions
PST = 0x1, {PST = [0x89B], DDATA= operand}
Operand Syntax
#imm,<ea>x
<ea>y,Rx
Dy,<ea>x
<ea>y,Dx
#imm,Dx
Dy,Dx
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source operand}
MCF5235 Reference Manual, Rev. 2
PST/DDATA
Freescale Semiconductor