MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 685

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

Operand Data:
Result Data:
32.6
The ColdFire Family provides support debugging real-time applications. For these types of
embedded systems, the processor must continue to operate during debug. The foundation of this
area of debug support is that while the processor cannot be halted to allow debugging, the system
can generally tolerate small intrusions into the real-time operation.
The debug module provides three types of breakpoints—PC with mask, operand address range,
and data with mask. These breakpoints can be configured into one- or two-level triggers with the
exact trigger response also programmable. The debug module programming model can be written
from either the external development system using the debug serial interface or from the
processor’s supervisor programming model using the WDEBUG instruction. Only CSR and
XCSR are readable using the external development system.
32.6.1
Breakpoint hardware can be configured to respond to triggers in several ways. The response
desired is programmed into TDR. As shown in
indication (CSR[BSTAT]) is provided on the DDATA output port when it is not displaying
captured processor status, operands, or branch addresses.
Freescale Semiconductor
Real-Time Debug Support
1
Theory of Operation
Although the debug module’s response to a write of an eTPU engine
debug register command is ’Status OK’, two BDM NOP commands
must follow the WDMREG command to allow enough time for the
write to propagate to the eTPU engine programming model.
Encodings not shown are reserved for future use.
Table 32-22. DDATA[3:0]/CSR[BSTAT] Breakpoint Response
DDATA[3:0]/CSR[BSTAT]
Longword data is written into the specified debug register. The data is
supplied most-significant word first. For byte-sized eTPU engine debug
registers, the operand data is left-justified in the 32-bit longword field.
Command complete status (0xFFFF) is returned when register write is
complete.
0000/0000
0010/0001
0100/0010
1010/0101
1100/0110
MCF5235 Reference Manual, Rev. 2
1
NOTE
Table
No breakpoints enabled
Waiting for level-1 breakpoint
Level-1 breakpoint triggered
Waiting for level-2 breakpoint
Level-2 breakpoint triggered
32-22, when a breakpoint is triggered, an
Breakpoint Status
Real-Time Debug Support
32-41