MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 668

MOD5234 10/100 ETHERNET MODULE

MOD5234-100IR

Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr

Specifications of MOD5234-100IR

Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
Debug Support
32.5.3.1.1
Some commands require extension words for addresses and/or immediate data. Addresses require
two extension words because only absolute long addressing is permitted. Longword accesses are
forcibly longword-aligned and word accesses are forcibly word-aligned. Immediate data can be 1
or 2 words long. Byte and word data each requires a single extension word and longword data
requires two extension words.
Operands and addresses are transferred most-significant word first. In the following descriptions
of the BDM command set, the optional set of extension words is defined as address, data, or
operand data.
32.5.3.2 Command Sequence Diagrams
The command sequence diagram in
bubble represents a 17-bit bus transfer. The top half of each bubble indicates the data the
development system sends to the debug module; the bottom half indicates the debug module’s
response to the previous development system commands. Command and result transactions
overlap to minimize latency.
32-24
7–6
5–4
2–0
Bit
8
3
Register
Op Size
Name
R/W
A/D
00
Extension Words as Required
Direction of operand transfer.
0 Data is written to the CPU or to memory from the development system.
1 The transfer is from the CPU to the development system.
Operand data size for sized operations. Addresses are expressed as 32-bit absolute values. Note
that a command performing a byte-sized memory read leaves the upper 8 bits of the response
data undefined. Referenced data is returned in the lower 8 bits of the response.
00 Byte
01 Word
10 Longword
11 Reserved
Reserved, should be cleared.
Address/data. Determines whether the register field specifies a data or address register.
0 Indicates a data register.
1 Indicates an address register.
Contains the register number in commands that operate on processor registers.
Table 32-19. BDM Field Descriptions (Continued)
Operand Size
MCF5235 Reference Manual, Rev. 2
Bit Values
32 bits
8 bits
16 bits
Figure 32-16
shows serial bus traffic for commands. Each
Description
Freescale Semiconductor

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