MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 27

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

31.4.3.3
31.4.3.4
31.4.3.5
31.4.3.6
31.4.3.7
31.4.3.8
31.4.3.9
31.5
31.5.1
31.5.2
32.1
32.1.1
32.2
32.3
32.3.1
32.4
32.4.1
32.4.2
32.4.3
32.4.4
32.4.5
32.4.6
32.4.7
32.4.8
32.5
32.5.1
32.5.2
32.5.2.1
32.5.2.2
32.5.3
32.5.3.1
32.5.3.2
32.5.3.3
32.6
32.6.1
32.6.1.1
32.6.2
Freescale Semiconductor
Paragraph
Number
Initialization/Application Information ........................................................................ 31-11
Introduction ................................................................................................................... 32-1
External Signal Description .......................................................................................... 32-3
Real-Time Trace Support .............................................................................................. 32-3
Memory Map/Register Definition ................................................................................ 32-6
ColdFire Background Debug Mode (BDM) ............................................................... 32-19
Real-Time Debug Support .......................................................................................... 32-41
Restrictions ............................................................................................................. 31-11
Nonscan Chain Operation ....................................................................................... 31-11
Overview ................................................................................................................... 32-1
Begin Execution of Taken Branch (PST = 0x5) ....................................................... 32-5
Revision A Shared Debug Resources ....................................................................... 32-7
Address Attribute Trigger Register (AATR) ............................................................ 32-8
Address Breakpoint Registers (ABLR, ABHR) ....................................................... 32-9
Configuration/Status Register (CSR) ...................................................................... 32-10
Extended Configuration/Status Register (XCSR) ................................................... 32-13
Data Breakpoint/Mask Registers (DBR, DBMR) ................................................... 32-15
Program Counter Breakpoint/Mask Registers (PBR, PBMR) ................................ 32-16
Trigger Definition Register (TDR) ......................................................................... 32-17
CPU Halt ................................................................................................................. 32-19
BDM Serial Interface .............................................................................................. 32-20
BDM Command Set ................................................................................................ 32-22
Theory of Operation ................................................................................................ 32-41
Concurrent BDM and Processor Operation ............................................................ 32-43
SAMPLE Instruction ............................................................................................ 31-9
SAMPLE/PRELOAD Instruction ....................................................................... 31-10
ENABLE_TEST_CTRL Instruction .................................................................. 31-10
HIGHZ Instruction .............................................................................................. 31-10
CLAMP Instruction ............................................................................................ 31-10
BYPASS Instruction ........................................................................................... 31-10
Receive Packet Format ....................................................................................... 32-21
Transmit Packet Format ...................................................................................... 32-22
ColdFire BDM Command Format ...................................................................... 32-23
Command Sequence Diagrams ........................................................................... 32-24
Command Set Descriptions ................................................................................ 32-26
Emulator Mode ................................................................................................... 32-43
ACCESS_AUX_TAP_eTPU Instruction .......................................................... 31-11
MCF5235 Reference Manual, Rev. 2
Debug Support
Contents
Chapter 32
Title
Number
Page
xxvii