MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 185

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

if it is recessive. When this condition exists, the FlexCAN waits for all internal activity other than
in the CAN bus interface to complete and then the following occurs:
Exiting stop mode is done in one of the following ways:
Recommendations for, and features of, FlexCAN’s stop mode operation are as follows:
8.3.2.21 eTPU Module
The eTPU module is unaffected by wait or doze modes. The module can generate an interrupt to
release the core from these modes.
In stop mode, the eTPU engines are halted.
8.3.2.22 BDM
Entering halt mode via the BDM port (by asserting the external BKPT pin) will cause the CPU to
exit any low-power mode.
Freescale Semiconductor
• The FlexCAN shuts down its clocks, stopping most of the internal circuits, to achieve
• The internal bus interface logic continues operation, enabling CPU to access the CANMCR
• The FlexCAN ignores its Rx input pin, and drives its Tx pins as recessive.
• FlexCAN loses synchronization with the CAN bus, and STOP_ACK and NOT_RDY bits
• Reset the FlexCAN (either by hard reset or by asserting the SOFT_RST bit in CANMCR).
• Clearing the MDIS bit in the CANMCR.
• Upon stop mode entry, the FlexCAN tries to receive the frame that caused it to wake; that
• Before asserting stop mode, the CPU should disable all interrupts in the FlexCAN,
• If stop mode is asserted while the FlexCAN is BUSOFF (see error and status register), then
• If halt mode is active at the time the MDIS bit is set, then the FlexCAN assumes that halt
• Trying to stop the FlexCAN immediately after reset is allowed only after basic initialization
maximum possible power saving.
register.
in CANMCR register are set.
is, it assumes that the dominant bit detected is a start-of-frame bit. It does not arbitrate for
the CAN bus then.
otherwise it may be interrupted while in stop mode upon a non-wake-up condition.
the FlexCAN enters stop mode and stops counting the synchronization sequence; it
continues this count once stop mode is exited.
mode should be exited; hence it tries to synchronize to the CAN bus (11 consecutive
recessive bits), and only then does it search for the correct conditions to stop.
has been performed.
MCF5235 Reference Manual, Rev. 2
Functional Description
8-11