MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 699

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

Freescale Semiconductor
Bits
7–5
Name
OVC
Table 32-28. DC Field Descriptions (Continued)
Overrun control. The EDM can be programmed to stall the eTPU operation avoiding errors
related to that engine due to full Event Queue. The eTPU can be stalled in any operations
but in the middle of an atomic sequence of accesses to the SDM.
The debug request has priority over the stall request, thus if a stall and a breakpoint request
happen at the same time, the eTPU will enter in debug mode.
The worst case happens whenever EDM asserts a request to delay the eTPU engine at the
beginning of the TST
microinstruction may generate up to two snapshots
positions when it asserts the STALL request: two for each of the TST cycles and one for the
Debug Status message.
The overrun control field controls how the EDM reacts when the Queue is about to get full.
If programmed to delay the processor, the EDM asserts the requests to delay the processor
when the Event Queue still has 7 available positions, thus keeping Event Queue positions
to avoid the EDM to lose information about the eTPU,. And negates the delay request as
soon as there are 8 available positions.
The request to delay the eTPU engine does not affect neither the other engine nor the CDC
operations. Therefore, in some extreme cases an overrun message may still be generated
even with OVC configured to delay the processor.
will be delayed until the Event Queue is enabled for storing snapshots again, which will
happen when the Event Queue gets empty.If the OVC field is changed to 0b011 while the
Event Queue has less than 5 available positions the EDM will automatically assert the stall
request. Thus, eTPU may still generate an overrun error before entering the STALL state.
If the OVC field is changed to 0b000 while the eTPU is in STALL state, the EDM will
automatically negate the stall request. Thus, eTPU may exit the STALL state.
A breakpoint request prevails over the request to delay the processor. Thus, if a breakpoint
request happens at the same time of a stall request, the eTPU will enter in HALT state
instead of STALL state.
MCF5235 Reference Manual, Rev. 2
001–010
100–111
OVC
000
011
1
and a debug request happens in the middle of TST. Since one single
Generate overrun message
Reserved, reverts to 000
Stall Processor to prevent overruns for eTPU
Reserved, reverts to 000
Description
Meaning
3
If an error event happens, the processor
2
, EDM needs to have 7 available
eTPU Debug Programming Model
32-55