MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 150

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

Clock Module
output. Consequently, frequency modulation is not available. To enter external clock mode, the
PLL must be set by following the procedure outlined in
7.1.3.5
This subsection describes the operation of the clock module in low-power and halted modes of
operation. Low-power modes are described in
the clock module operation in low-power modes.
In wait and doze modes, the system clocks to the peripherals are enabled, and the clocks to the
CPU, and SRAM are stopped. Each module can disable its clock locally at the module level.
During stop mode, the PLL continues to run. The external CLKOUT signal may be enabled or
disabled when the device enters stop mode, depending on the LPCR[STPMD] bit settings.
The external CLKOUT output pin may be disabled to lower power consumption via the
SYNCR[DISCLK] bit. The external CLKOUT pin function is enabled by default at reset.
7.2
The clock module signals are summarized in
detailed information, refer to
7-6
Low-power Mode
External Signal Descriptions
Doze
Wait
Stop
Low-power Mode Operation
XTAL must be tied low in external clock mode when reset is asserted.
If it is not, clocks could be suspended indefinitely.
Table 7-1. Clock Module Operation in Low-power Modes
EXTAL
XTAL
CLKOUT
All system clocks disabled, but clock module
Clocks sent to peripheral modules only
Clocks sent to peripheral modules only
Name
Chapter 14, “Signal
Clock Operation
continues to run
Table 7-2. Signal Properties
MCF5235 Reference Manual, Rev. 2
Oscillator or clock input
Oscillator output
Internal bus clock output
NOTE
Table 7-2
Chapter 8, “Power
Descriptions.”
Function
Section 7.4.3, “System Clock Generation.”
and a brief description follows. For more
Exit not caused by clock module, but normal
Exit not caused by clock module, but normal
sources are re-enabled and normal clocking
Exit not caused by clock module, but clock
clocking resumes upon mode exit
clocking resumes upon mode exit
Management.”
resumes upon mode exit
Mode Exit
Freescale Semiconductor
Table 7-1
shows