MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 459

MOD5234 10/100 ETHERNET MODULE

MOD5234-100IR

Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr

Specifications of MOD5234-100IR

Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
To exit freeze mode, the BKPT line must be negated or the HALT bit in CANMCRn must be
cleared. Once freeze mode is exited, the FlexCAN will resynchronize with the CAN bus by
waiting for 11 consecutive recessive bits before beginning to participate in CAN bus
communication.
21.1.3.3 Module Disabled Mode
This mode disables the FlexCAN module; it is entered by setting CANMCRn[MDIS]. If the
module is disabled during freeze mode, it shuts down the system clocks, sets the LPMACK bit,
and clears the FRZACK bit.
If the module is disabled during transmission or reception, FlexCAN does the following:
The bus interface unit continues to operate, enabling the CPU to access memory mapped registers,
except the free-running timer, the error counter register and the message buffers, which cannot be
accessed when the module is disabled. Exiting from this mode is done by negating the MDIS bit,
which will resume the clocks and negate the LPMACK bit.
21.1.3.4 Loop-Back Mode
The module enters this mode when the LPB bit in the control register is set. In this mode, FlexCAN
performs an internal loop back that can be used for self test operation. The bit stream output of the
transmitter is internally fed back to the receiver input. The Rx CAN input pin is ignored and the
Tx CAN output goes to the recessive state (logic 1). FlexCAN behaves as it normally does when
transmitting and treats its own transmitted message as a message received from a remote node. In
this mode, FlexCAN ignores the bit sent during the ACK slot in the CAN frame acknowledge field
to ensure proper reception of its own message. Both transmit and receive interrupts are generated.
21.1.3.5 Listen-Only Mode
In listen-only mode, transmission is disabled, all error counters are frozen and the module operates
in a CAN error passive mode. Only messages acknowledged by another CAN station will be
received. If FlexCAN detects a message that has not been acknowledged it will flag a BIT0 error
(without changing the REC), as if it was trying to acknowledge the message. Because the module
does not influence the CAN bus in this mode, the device is capable of functioning like a monitor
or for automatic bit-rate detection.
Freescale Semiconductor
• Waits to be in either idle or bus-off state, or else waits for the third bit of intermission and
• Waits for all internal activities such as arbitration, matching, move-in, and move-out to
• Ignores its Rx input pin and drives its Tx pin as recessive
• Shuts down the system clocks
then checks it to be recessive
finish
MCF5235 Reference Manual, Rev. 2
Introduction
21-5

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