MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 519

MOD5234 10/100 ETHERNET MODULE

MOD5234-100IR

Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr

Specifications of MOD5234-100IR

Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
A write to QDR causes data to be written to the RAM entry specified by QAR[ADDR] and causes
the value in QAR to increment. Correspondingly, a read at QDR returns the data in the RAM at
the address specified by QAR[ADDR]. This also causes QAR to increment. A read access requires
a single wait state.
25.2.1.1 Receive RAM
Data received by the QSPI is stored in the receive RAM segment located at 0x10 to 0x1F in the
QSPI RAM space. The user reads this segment to retrieve data from the QSPI. Data words with
less than 16 bits are stored in the least significant bits of the RAM. Unused bits in a receive queue
entry are set to zero upon completion of the individual queue entry.
QWR[CPTQP] shows which queue entries have been executed. The user can query this field to
determine which locations in receive RAM contain valid data.
25.2.1.2 Transmit RAM
Data to be transmitted by the QSPI is stored in the transmit RAM segment located at addresses
0x0 to 0xF. The user normally writes 1 word into this segment for each queue command to be
executed. The user cannot read data in the transmit RAM.
Freescale Semiconductor
Figure 25-2. QSPI RAM Model
Address
MCF5235 Reference Manual, Rev. 2
Relative
0x0F
0x1F
0x2F
0x00
0x01
0x10
0x11
0x20
0x21
...
...
...
Register
QRR15
QCR15
QTR15
QRR0
QRR1
QCR0
QCR1
QTR0
QTR1
...
...
...
Transmit RAM
16 bits wide
Receive RAM
16 bits wide
Command RAM
8 bits wide
Function
Operation
25-5

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