MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 556

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

UART Modules
26.4.3
The UART can be configured to operate in various looping modes as shown in
These modes are useful for local and remote system diagnostic functions. The modes are described
in the following paragraphs and in
The UART’s transmitter and receiver should be disabled when switching between modes. The
selected mode is activated immediately upon mode selection, regardless of whether a character is
being received or transmitted.
26.4.3.1 Automatic Echo Mode
In automatic echo mode, shown in
bit by bit. The local CPU-to-receiver communication continues normally, but the
CPU-to-transmitter link is disabled. In this mode, received data is clocked on the receiver clock
and re-sent on UnTXD. The receiver must be enabled, but the transmitter need not be.
Because the transmitter is inactive, USRn[TxEMP,TxRDY] are inactive and data is sent as it is
received. Received parity is checked but is not recalculated for transmission. Character framing is
also checked, but stop bits are sent as they are received. A received break is echoed as received
until the next valid start bit is detected.
26.4.3.2 Local Loop-Back Mode
Figure 26-22
This mode is for testing the operation of a local UART module channel by sending data to the
transmitter and checking data assembled by the receiver to ensure proper operations.
26-24
Looping Modes
shows how UnTXD and UnRXD are internally connected in local loop-back mode.
The receiver can still read characters in the FIFO if the receiver is
disabled. If the receiver is reset, the FIFO, UnRTS control, all receiver
status bits, and interrupts, and DMA requests are reset. No more
characters are received until the receiver is reenabled.
CPU
Disabled
Figure 26-21. Automatic Echo
MCF5235 Reference Manual, Rev. 2
Section 26.3, “Memory Map/Register
Figure
Rx
Tx
26-21, the UART automatically resends received data
NOTE
Disabled
UnRXD Input
UnTXD Output
Definition.”
Freescale Semiconductor
Figure
26-20.