MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 381
![MOD5234 10/100 ETHERNET MODULE](/photos/28/91/289101/mod-100ir_sml.jpg)
MOD5234-100IR
Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(3 pages)
2.MOD5234-100IR.pdf
(4 pages)
3.MOD5234-100IR.pdf
(754 pages)
Specifications of MOD5234-100IR
Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
- Current page: 381 of 754
- Download datasheet (13Mb)
19.2.4.8 MIB Control Register (MIBC)
The MIBC is a read/write register used to provide control of and to observe the state of the MIB
block. This register is accessed by user software if there is a need to disable the MIB block
operation. For example, in order to clear all MIB counters in RAM the user should disable the MIB
block, then clear all the MIB RAM locations, then enable the MIB block. The MIB_DIS bit is reset
to 1. See
Freescale Semiconductor
Address
Reset
Reset
29–0
Bits
31
30
W
W
R MIB_
R
Table 19-3
DIS
31
15
1
0
0
System Clock Frequency
MIB_IDLE
MIB_DIS
MIB_
IDLE
Name
30
14
1
0
0
—
for the locations of the MIB counters.
25 MHz
33 MHz
40 MHz
50 MHz
66 MHz
75 MHz
29
13
Table 19-11. Programming Examples for MSCR
0
0
0
0
A read/write control bit. If set, the MIB logic will halt and not update any MIB counters.
A read-only status bit. If set the MIB block is not currently updating any MIB counters.
Reserved.
Figure 19-9. MIB Control Register (MIBC)
28
12
0
0
0
0
Table 19-12. MIBC Field Descriptions
27
11
0
0
0
0
MCF5235 Reference Manual, Rev. 2
26
10
0
0
0
0
MSCR[MII_SPEED]
25
0
0
0
0
9
IPSBAR + 0x1064
0x5
0x8
0xA
0xE
0xF
0x7
24
0
0
0
0
8
23
Description
0
0
0
0
7
22
0
0
6
0
0
21
0
0
0
0
EMDC frequency
5
2.36 MHz
2.36 MHz
2.5 MHz
2.5 MHz
2.5 MHz
2.5 MHz
20
0
0
0
0
4
Memory Map/Register Definition
19
0
0
0
0
3
18
0
0
0
0
2
17
0
0
0
0
1
16
0
0
0
0
0
19-17
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