HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 136

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HD64570

Manufacturer Part Number
HD64570
Description
Serial Communications Adaptor
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Bit 2 (SYNCLD: SYN Character Load Enable): Specifies whether or not to transfer the SYN
character specified by synchronous/address register 0 (SA0) in the data field to the receive buffer
in byte synchronous mode. See section 5.3.2, Byte Synchronous Mode.
Bit 1: Reserved. This bit must always be set to 0. If set to 1, the SCA operation is not guaranteed.
Bit 0 (RTS: Request to Send): Specifies the RTS line output level.
Rev. 0, 07/98, page 120 of 453
Asynchronous mode
Reserved. This bit always reads 0 and must be set to 0.
Byte synchronous mode
SYNCLD = 0: Deletes SYN character in the data field instead of transferring it to the receive
buffer
SYNCLD = 1: Transfers the SYN character in the data field to the receive buffer
Bit synchronous mode
Reserved. This bit always reads 0 and must be set to 0.
Asynchronous/Byte synchronous/Bit synchronous mode
RTS = 0:
RTS = 1:
In asynchronous mode, when the auto-enable mode is selected, (the AUTO bit of mode register
0 (MD0) is 1) the RTS line is driven low by transmit operation, regardless of the RTS bit
setting.
Sets the RTS line level low
Sets the RTS line level high

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