HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 173

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

5.2.17
The frame interrupt enable register (FIE) enables or disables interrupt requests when the EOMF bit
of the frame status register (FST) is set to 1.
Bit 7 (EOMFE; EOMF Interrupt Enable): The function of this bit is described below.
Bits 6 0: Reserved. These bits always read 0 and must be set to 0.
Asynchronous/Byte synchronous mode
Reserved. This bit always reads 0 and must be set to 0.
Bit synchronous mode
EOMFE = 0: Disables an interrupt set by the EOMF bit of FST
EOMFE = 1: Enables an interrupt set by the EOMF bit of FST; the RXINT bit of ST0 is set to
1 when the EOMF and EOMFE bits are both 1
MSCI Frame Interrupt Enable Register (FIE)
Async
Byte sync
Bit sync HDLC
Read/Write
Initial value
Note: The bits marked with * are reserved. These bits always read 0 and must
be set to 0.
EOMF interrupt enable
• Bit synchronous mode
0: Disable
1: Enable
EOMFE
R/W
—
7
0
*
—
—
6
0
*
—
—
5
0
*
—
—
4
0
*
—
—
3
0
*
Rev. 0, 07/98, page 157 of 453
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—
2
0
*
—
—
1
0
*
—
—
0
0
*