HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 142

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

Specific values are listed in table 5.21, Register Values and Bit Rates in Asynchronous Mode, and
table 5.22, Register Values and Bit Rates in Byte Synchronous/Bit Synchronous Mode.
5.2.8
The command register (CMD) specifies the command for MSCI transmission/reception control.
This is a write-only register and always reads 00H.
Bits 7–6: Reserved. These bits always read 0 and must be set to 0.
Bits 5–0 (CMD5–CMD0: Command): The functions of these bits are described below.
Rev. 0, 07/98, page 126 of 453
Asynchronous/Byte synchronous/Bit synchronous mode
Bits 5–0 specify three types of commands: transmit, receive, and other commands. These
commands and their values are described in table 5.1 to table 5.3.
Async
Byte sync
Bit sync HDLC
Read/Write
Initial value
• Transmit commands
000001:
000010:
000011:
000100:
000101:
000110:
000111:
001000:
001001:
Others:
Notes:
MSCI Command Register (CMD)
1. Reserved. These bits always read 0 and must be set to 0.
2. When this setting is selected, normal operation is not guaranteed.
TX reset
TX enable
TX disable
TX CRC initialization
TX CRC calculation
exclusion
End-of-message
Abort transmission
MP bit on
TX buffer clear
Reserved
—
—
—
7
*1
*2
—
—
—
6
*1
CMD5
W
• Receive commands
010001:
010010:
010011:
010100:
010101:
010110:
010111:
011000:
—
5
CMD4
—
W
4
RX reset
RX enable
RX disable
RX CRC initialization
Message reject
Search MP bit
RX CRC calculation
exclusion
Forcing RX CRC
calculation
—
CMD3
W
Command
3
—
CMD2
W
2
—
CMD1
W
• Other commands
100001:
110001:
000000:
1
—
CMD0
W
0
Channel reset
Enter search mode
No operation