HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 178

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

5.2.20
The idle pattern register (IDL) specifies the idle pattern output by the transmitter when it is in idle
state.
Bits 7 0 (IDL7 IDL0: Idle Pattern): The function of these bits is described below.
Rev. 0, 07/98, page 162 of 453
Asynchronous mode
Not used
Byte synchronous/Bit synchronous mode
When the IDLC bit of the control register (CTL) is 1, the idle pattern set in this register is
output from the TXD line during the idle state. When the IDLC bit is 0, the TXD line is fixed
high.
MSCI Idle Pattern Register (IDL)
Async
Byte sync
Bit sync HDLC
Read/Write
Initial value
Note: This register is not used in asynchronous mode.
R/W
IDL7
—
7
1
R/W
IDL6
—
6
1
R/W
Idle pattern
IDL5
—
5
1
—
R/W
IDL4
4
1
—
R/W
IDL3
3
1
—
R/W
IDL2
2
1
—
R/W
IDL1
1
1
—
R/W
IDL0
0
1