HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 18

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HD64570

Manufacturer Part Number
HD64570
Description
Serial Communications Adaptor
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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1.3
Table 1.1
Item
MSCI (multiprotocol
serial communication
interface)
Bus interface
Rev. 0, 07/98, page 2 of 453
Basic Functions
Major Functions of the SCA
Maximum data transfer
rate
Number of channels
Operating modes
Protocol functions
Error detection
Transmission codes
FIFO
Clock sources
Modem control
ADPLL (Advanced
digital PLL)
Baud rate generator
MPU modes
Data bus width
Address bus width
Specification
7.1 Mbits/s (f = 10 MHz)
12 Mbits/s (f = 16.7 MHz)
5.7 Mbits/s (f = 8 MHz)*
2
Normal operating mode (full duplex)
Auto echo mode
Local loop back mode
Asynchronous: 5 to 8 bits, parity (odd, even, or
none)
Byte synchronous: mono-sync, bi-sync, or
external synchronization
Bit synchronous: HDLC mode
Five types (parity error, framing error, CRC error,
overrun error, underrun error)
Five types (NRZ, NRZI, FM0, FM1, Manchester)
Transmit 32 bytes/receive
Internal clock sources:
1. On-chip baud rate generators can generate
arbitrary baud rates (independent transmit/
receive baud rate generators are provided for
each channel)
2. On-chip digital PLL (independent ADPLLs for
each receive channel)
External clock
CTS, RTS, DCD
On-chip advanced digital PLLs:
1. For extraction of clock signals
2. For suppressing noise in received data and
clock signals
On-chip (independent transmit and receive baud
rate generators for each channel)
Four externally selectable modes:
1. 8086-system 16-bit MPU
2. 64180-system 8-bit MPU
3. 68000-system 16-bit MPUI
4. 68000-system 16-bit MPUII
8 or 16 bits
24 bits
32 bytes

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