HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 48

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

Rev. 0, 07/98, page 32 of 453
Store data
1. Decode address
2. Write data
3. WAIT inactive
End of cycle
WAIT active
Memory
Figure 1.20 Receive DMA Operation (CPU modes 2 and 3)
Access memory
1. Select write with R/W
2. Put address on bus (A to A )
3. AS active
End of transfer
AS, HDS, and LDS inactive
Or start next cycle
Relinquish bus
Data valid
HDS or LDS active
Get bus
DMAC
1
SCA
When the number of bytes of data in
RX FIFO has risen to the number set in
MSCI RX ready control register (RRC) +
1 or greater, and RX FIFO has not
subsequently become empty
23
End of cycle
If RX FIFO is empty after
this transfer, negate
the DMA request
DMA Request
RXRDY active
Send data
Put data on bus
MSCI