HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 351

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

Transmission Processing Routine: An example of a transmission processing routine is given in
figure 9.5.
9.1.5
Initialization: An example of an initialization program is given below.
CMD fl 21H........................................ Resets channel.
MD0
MD1
MD2
CTL
RRC
RXS
IE0
IE1
fl 87H........................................ Specifies bit synchronous HDLC mode.
fl 40H........................................ Specifies single address 1.
fl 00H........................................ Specifies the NRZ code.
fl 01H........................................ Specifies FCS no-load.
fl 00H........................................ RXRDY = 1 when the receive buffer is not empty.
fl 00H........................................ Specifies RXC line input for the receive clock.
fl 40H........................................ Enables RXINT interrupts.
fl 03H........................................ Enables abort detection interrupts.
Reception in DMA Chained-Block Transfer Mode (Bit Synchronous HDLC Mode)
Figure 9.5 TXINT Interrupt Processing Routine (using HD64180)
Note: An interrupt is also generated when the DMAC
Process interrupt, reset ST1
Analyze interrupt source
completes the transmission of a frame.
Issue EI instruction
Read ST1
Return
Start
Specifies CRC-CCITT mode, and presets to all 1s.
Specifies full-duplex mode.
Underrun error
ST1: Status register 1
Rev. 0, 07/98, page 335 of 453