HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 412

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

Rev. 0, 07/98, page 396 of 453
Register
System
Low Power Register (LPR)
Not used
Wait Control
Physical Address
Boundary Registers 0
(PABR0)
Physical Address
Boundary Registers 1
(PABR1)
Wait Control Registers L
(WCRL)
CPU
Mode
0, 1
00H
01H
02H
03H
04H
Address
Appendix B Registers
CPU
Mode
2, 3
01H
00H
03H
02H
05H
Bit name
Read/Write
Initial value
Bit name
Read/Write
Initial value
Bit name
Read/Write
Initial value
Remarks
Read/Write
Initial value
Bit name
PB07 PB06 PB05 PB04 PB03 PB02 PB01 PB00
PB17 PB16 PB15 PB14 PB13 PB12 PB11 PB10
R/W
R/W
—
—
7
0
7
0
7
0
—
—
7
0
PAL/PAM boundary address (high-order 8 bits)
PAM/PAH boundary address (high-order 8 bits)
R/W
R/W
—
—
6
0
6
0
6
0
—
—
6
0
R/W
R/W
—
—
5
0
5
0
5
0
—
—
I/O stop
0:
1:
5
0
No transition to system stop mode
Transition to system stop mode
R/W
R/W
—
—
—
4
0
4
0
4
0
—
4
0
— PALW2PALW1
R/W
R/W
—
3
0
3
0
3
0
—
—
3
0
R/W
R/W
R/W
2
0
2
1
2
0
—
—
2
0
PAL area wait
R/W
R/W
R/W
1
0
1
1
1
0
—
—
1
0
PALW0
R/W
R/W
R/W
IOSTP
R/W
0
0
0
1
0
0
0
0