HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 328

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

7.5
In system stop mode, the following events occur:
System stop mode is canceled by RESET input; TEPR is cleared simultaneously.
7.6
The timers are initialized at reset as follows:
Rev. 0, 07/98, page 312 of 453
T0IRQ to T3IRQ:
Timer up-
counter
(TCNT)
CMF
T0IRQ, T1IRQ,
T2IRQ, T3IRQ
The CMF and TME bits of the timer constant/status register (TCSR) are cleared.
TCSR and the timer expand prescale register (TEPR) retain their current contents, except the
CMF and TME bits of TCSR.
The timer up-counter (TCNT) stops and is initialized to 0000H.
No interrupt request is generated.
The timer control/status register (TCSR) and the timer expand prescale register (TEPR) are
initialized to 0000H.
The timer up-counter (TCNT) stops and is initialized to 0000H.
The timer constant register (TCONR) is initialized to FFFFH.
No interrupt request is generated.
: Internal clock
Operation in System Stop Mode
Reset Operation
TCONR:
TCSR:
TCNT:
Figure 7.4 Interrupt Timing (when the counter operating rate is BC)
CMF:
TCNT = TCONR
Timer up-counter
Timer constant register
Timer control/status register
Bit 7 of TCSR
Timer interrupt requests
1 clock
TCNT = 0000H
Read TCSR after interrupt processing
TCNT = 0001H
Read TCNT