HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 208

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HD64570

Manufacturer Part Number
HD64570
Description
Serial Communications Adaptor
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Rev. 0, 07/98, page 192 of 453
The transmitter transmits a 16-bit CRC code. If data remains in the transmit buffer after
transmission, the transmitter enters SYN1 wait state. If no data remains, it enters idle state.
(CRC code is specified with the CRC1 CRC0 bits of MD0. Whether to perform CRC
calculation and to send the result is specified with the CRCCC bit of MD0. For details, see
section 5.2.1, MSCI Mode Register 0 (MD0).)
Initialization by
reset
Figure 5.24 State Transition Diagram for Transmission in Byte Synchronous Mode
TX disable
state
transmit state
transmit state
SYN1
SYN2
"Channel reset" or "TX reset"
issued in any state
Bi-sync
Data remaining in
transmit buffer
UDRNC: Underrun state control bit (control register (CTL) bit 5)
CRCCC: CRC calculation bit (mode register 0 (MD0) bit 2)
EOM: End of message command
Note: Command names are enclosed in double quotation marks ("").
"TX enable" issued
"TX disable" issued
and no data remaining
in transmit buffer
Data remains in transmit buffer
After SYN2 transmission
Mono-sync,
external
synchro-
nization
Data remaining
in transmit buffer
and "EOM" not
issued
transmit state
Character
state
Idle
Underrun state and
UDRNC = 0, "EOM" issued
and CRCCC = 0, or
underrun state and
UDRNC = 1 and CRCCC = 0
"EOM" issued
and CRCCC = 1, or
underrun state and
UDRNC = 1 and
CRCCC = 1
No data remaining in transmit buffer
and "TX disable" not issued
No data in transmit buffer
CRC transmit
state

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