HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 139

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HD64570

Manufacturer Part Number
HD64570
Description
Serial Communications Adaptor
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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The TX clock source register (TXS) specifies the transmit clock source and the baud rate of the
baud rate generator (BRG) in the transmitter. For details on the baud rate generator, see section
5.6, Baud Rate Generator.
This register is reset under either of the following conditions:
Hardware reset
Channel reset command
Async
Byte sync
Bit sync HDLC
Read/Write
Initial value
Notes:
Transmit clock source
000:
100:
110:
Others:
5.2.6
1. Reserved. This bit always reads 0 and must be set to 0.
2. Reserved. When these settings are selected, normal operation is not guaranteed.
TXC line input
Internal baud rate generator (BRG) output
Receive clock
MSCI TX Clock Source Register (TXS)
Reserved
7
0
*1
TXCS2
R/W
*2
6
0
TXCS1
R/W
5
0
R/W
TXCS0
4
0
TXBR3
R/W
3
0
TXBR2
R/W
2
0
Transmitter baud rate
• Clock division ratio
0000:
0001:
0010:
0011:
0100:
0101:
0110:
0111:
1000:
1001:
Others:
Rev. 0, 07/98, page 123 of 453
TXBR1
R/W
1/1
1/2
1/4
1/8
1/16
1/32
1/64
1/128
1/256
1/512
1
0
Reserved
TXBR0
R/W
0
0
*2

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