HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 304

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

Rev. 0, 07/98, page 288 of 453
Figure 6.19 Operation Flow in MSCI-to-Memory Chained-Block Transfer Mode
No
Transfer one byte or one
word, decrement BCR,
Load the start address of
(CP) (16 bits) to DMAC
Write receive data (DL)
the next descriptor from
(BP) (24 bits) to BAR
and increment BAR
Load buffer pointer
Write 00H to status
work register to CDA
Load chain pointer
Load BFL (16 bits)
frame detected?
(ST) field (8 bits)
length (16 bits)
CDA = EDA?
work register
Yes
BCR = 0?
to BCR
End of
Start
No
No
Yes
Yes
No
Load the start address of
the next descriptor from
length (DL) (16 bits)
Write receive data
work register to CDA
Write FST value to
status (ST) field
(DE bit = 0)
Transfer
completed?
Yes
(8 bits)
End
CDA:
EDA:
BFL:
BCR:
FST:
DE bit:
Current descriptor
address register
Error descriptor
address register
Receive buffer length
Byte count register
Frame status register
DMA status register
(DSR) bit 1